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A Model-Driven Design Framework for Massively Parallel Embedded Systems
Abdoulaye Gamatié, Sébastien Le Beux, Éric Piel, Rabie Ben Atitallah, Anne Etien, Philippe Marquet, Jean-Luc Dekeyser
Article No.: 39
Modern embedded systems integrate more and more complex functionalities. At the same time, the semiconductor technology advances enable to increase the amount of hardware resources on a chip for the execution. Massively parallel embedded systems...
Demand Paging Techniques for Flash Memory Using Compiler Post-Pass Optimizations
Seungkyun Kim, Kiwon Kwon, Chihun Kim, Choonki Jang, Jaejin Lee, Sang Lyul Min
Article No.: 40
In this article, we propose an application-specific demand paging mechanism for low-end embedded systems that have flash memory as secondary storage. These systems are not equipped with virtual memory. A small memory space called an execution...
LARK: A Lightweight Authenticated ReKeying Scheme for Clustered Wireless Sensor Networks
Gianluca Dini, Ida M. Savino
Article No.: 41
Group communication has proven a powerful paradigm for designing applications and services in Wireless Sensor Networks (WSNs). Given the tight interaction between WSNs and the physical world, a security infringement may translate into a safety...
Embedded systems use specialized hardware devices to interact with their environment, and since they have to be dependable, it is attractive to use a modern, type-safe programming language like Java to develop programs for them. Standard Java, as...
Inexpensive, reliable hard disk storage is increasingly required in both businesses and the home. As disk capacities increase and multiple drives are combined in one system the probability of multiple disk failures increases. Through the adoption...
Compiler-Supported Thread Management for Multithreaded Network Processors
Xiaotong Zhuang, Santosh Pande
Article No.: 44
Traditionally, runtime management involving CPU sharing, real-time scheduling, etc., is provided by the runtime environment (typically an operating system) using hardware support such as timers and interrupts. However, due to stringent performance...
The ReNoC Reconfigurable Network-on-Chip: Architecture, Configuration Algorithms, and Evaluation
Matthias Bo Stuart, Mikkel Bystrup Stensgaard, Jens Sparsø
Article No.: 45
This article presents a reconfigurable network-on-chip architecture called ReNoC, which is intended for use in general-purpose multiprocessor system-on-chip platforms, and which enables application-specific logical NoC topologies to be configured,...
A Robust Mechanism for Adaptive Scheduling of Multimedia Applications
Tommaso Cucinotta, Luca Abeni, Luigi Palopoli, Giuseppe Lipari
Article No.: 46
We propose an adaptive scheduling technique to schedule highly dynamic multimedia tasks on a CPU. We use a combination of two techniques: the first one is a feedback mechanism to track the resource requirements of the tasks based on...
Efficient Spilling Reduction for Software Pipelined Loops in Presence of Multiple Register Types in Embedded VLIW Processors
Sid-Ahmed-Ali Touati, Frederic Brault, Karine Deschinkel, Benoît Dupont de Dinechin
Article No.: 47
Integrating register allocation and software pipelining of loops is an active research area. We focus on techniques that precondition the dependence graph before software pipelining in order to ensure that no register spill instructions are...
Adaptive and Radio-Agnostic QoS for Body Sensor Networks
Gang Zhou, Qiang Li, Jingyuan Li, Yafeng Wu, Shan Lin, Jian Lu, Chieh-Yih Wan, Mark D. Yarvis, John A. Stankovic
Article No.: 48
As wireless devices and sensors are increasingly deployed on people, researchers have begun to focus on wireless body-area networks. Applications of wireless body sensor networks include healthcare, entertainment, and personal assistance, in which...