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ACM Transactions on Embedded Computing Systems (TECS) - Special issue on application-specific processors, Volume 13 Issue 2, September 2013

Introduction to the special issue on application-specific processors
Philip Brisk, Tulika Mitra
Article No.: 15
DOI: 10.1145/2514641.2514642

Hardware architectural support for control systems and sensor processing
Sudhanshu Vyas, Adwait Gupte, Christopher D. Gill, Ron K. Cytron, Joseph Zambreno, Phillip H. Jones
Article No.: 16
DOI: 10.1145/2514641.2514643

The field of modern control theory and the systems used to implement these controls have shown rapid development over the last 50 years. It was often the case that those developing control algorithms could assume the computing medium was solely...

Multicore-based vector coprocessor sharing for performance and energy gains
Spiridon F. Beldianu, Sotirios G. Ziavras
Article No.: 17
DOI: 10.1145/2514641.2514644

For most of the applications that make use of a dedicated vector coprocessor, its resources are not highly utilized due to the lack of sustained data parallelism which often occurs due to vector-length variations in dynamic environments. The...

A systematic approach for optimized bypass configurations for application-specific embedded processors
Thorsten Jungeblut, Boris Hübener, Mario Porrmann, Ulrich Rückert
Article No.: 18
DOI: 10.1145/2514641.2514645

The diversity of today's mobile applications requires embedded processor cores with a high resource efficiency, that means, the devices should provide a high performance at low area requirements and power consumption. The fine-grained parallelism...

Custom architecture for multicore audio beamforming systems
Dimitris Theodoropoulos, Georgi Kuzmanov, Georgi Gaydadjiev
Article No.: 19
DOI: 10.1145/2514641.2514646

The audio Beamforming (BF) technique utilizes microphone arrays to extract acoustic sources recorded in a noisy environment. In this article, we propose a new approach for rapid development of multicore BF systems. Research on literature reveals...

Design-space exploration and runtime resource management for multicores
Giovanni Mariani, Gianluca Palermo, Vittorio Zaccaria, Cristina Silvano
Article No.: 20
DOI: 10.1145/2514641.2514647

Application-specific multicore architectures are usually designed by using a configurable platform in which a set of parameters can be tuned to find the best trade-off in terms of the selected figures of merit (such as energy, delay, and area)....

Memory performance estimation of CUDA programs
Yooseong Kim, Aviral Shrivastava
Article No.: 21
DOI: 10.1145/2514641.2514648

CUDA has successfully popularized GPU computing, and GPGPU applications are now used in various embedded systems. The CUDA programming model provides a simple interface to program on GPUs, but tuning GPGPU applications for high performance is...

Parallel architectures for the kNN classifier -- design of soft IP cores and FPGA implementations
Ioannis Stamoulias, Elias S. Manolakos
Article No.: 22
DOI: 10.1145/2514641.2514649

We designed a variety of k-nearest-neighbor parallel architectures for FPGAs in the form of parameterizable soft IP cores. We show that they can be used to solve large classification problems with thousands of training vectors, or thousands of...

Automatic synthesis of physical system differential equation models to a custom network of general processing elements on FPGAs
Chen Huang, Frank Vahid, Tony Givargis
Article No.: 23
DOI: 10.1145/2514641.2514650

Fast execution of physical system models has various uses, such as simulating physical phenomena or real-time testing of medical equipment. Physical system models commonly consist of thousands of differential equations. Solving such equations...

LegUp: An open-source high-level synthesis tool for FPGA-based processor/accelerator systems
Andrew Canis, Jongsok Choi, Mark Aldham, Victor Zhang, Ahmed Kammoona, Tomasz Czajkowski, Stephen D. Brown, Jason H. Anderson
Article No.: 24
DOI: 10.1145/2514740

It is generally accepted that a custom hardware implementation of a set of computations will provide superior speed and energy efficiency relative to a software implementation. However, the cost and difficulty of hardware design is often...

Efficient compilation of CUDA kernels for high-performance computing on FPGAs
Alexandros Papakonstantinou, Karthik Gururaj, John A. Stratton, Deming Chen, Jason Cong, Wen-Mei W. Hwu
Article No.: 25
DOI: 10.1145/2514641.2514652

The rise of multicore architectures across all computing domains has opened the door to heterogeneous multiprocessors, where processors of different compute characteristics can be combined to effectively boost the performance per watt of different...