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Editorial: Embedded, Cyber-Physical, Hybrid…
Sandeep K. Shukla
Article No.: 145
DOI: 10.1145/2678027


Section: Editorial

A Design and Analysis Framework for Thermal-Resilient Hard Real-Time Systems
Pradeep M. Hettiarachchi, Nathan Fisher, Masud Ahmed, Le Yi Wang, Shinan Wang, Weisong Shi
Article No.: 146
DOI: 10.1145/2632154

We address the challenge of designing predictable real-time systems in an unpredictable thermal environment where environmental temperature may dynamically change (e.g., implantable medical devices). Towards this challenge, we propose a...

Cache-Related Preemption Delay Analysis for Multilevel Noninclusive Caches
Sudipta Chattopadhyay, Abhik Roychoudhury
Article No.: 147
DOI: 10.1145/2632156

With the rapid growth of complex hardware features, timing analysis has become an increasingly difficult problem. The key to solving this problem lies in the precise and scalable modeling of performance-enhancing processor features (e.g., cache)....

Real-Time Power Management for Embedded M2M Using Intelligent Learning Methods
Anand Paul
Article No.: 148
DOI: 10.1145/2632158

In this work, an embedded system working model is designed with one server that receives requests by a requester by a service queue that is monitored by a Power Manager (PM). A novel approach is presented based on reinforcement learning to predict...

Minimizing Stack and Communication Memory Usage in Real-Time Embedded Applications
Haibo Zeng, Marco Di Natale, Qi Zhu
Article No.: 149
DOI: 10.1145/2632160

In the development of real-time embedded applications, especially those on systems-on-chip, an efficient use of RAM memory is as important as the effective scheduling of the computation resources. The protection of communication and state...

Multicopy Cache: A Highly Energy-Efficient Cache Architecture
Arup Chakraborty, Houman Homayoun, Amin Khajeh, Nikil Dutt, Ahmed Eltawil, Fadi Kurdahi
Article No.: 150
DOI: 10.1145/2632162

Caches are known to consume a large part of total microprocessor energy. Traditionally, voltage scaling has been used to reduce both dynamic and leakage power in caches. However, aggressive voltage reduction causes process-variation-induced...

STEAM: A Smart Temperature and Energy Aware Multicore Controller
Vinay Hanumaiah, Digant Desai, Benjamin Gaudette, Carole-Jean Wu, Sarma Vrudhula
Article No.: 151
DOI: 10.1145/2661430

Recent empirical studies have shown that multicore scaling is fast becoming power limited, and consequently, an increasing fraction of a multicore processor has to be under clocked or powered off. Therefore, in addition to fundamental innovations...

Section: Editorial

Introduction to Special Issue on Risk and Trust in Embedded Critical Systems
Judith E. Y. Rossebø, Siv Hilde Houmb, Geri Georg, Virginia N. L. Franqueira, Dimitrios Serpanos
Article No.: 152
DOI: 10.1145/2659008

Designing Trusted Embedded Systems from Finite State Machines
Carson Dunbar, Gang Qu
Article No.: 153
DOI: 10.1145/2638555

Sequential components are crucial for a real-time embedded system as they control the system based on the system's current state and real life input. In this article, we explore the security and trust issues of sequential system design from the...

Combating Software and Sybil Attacks to Data Integrity in Crowd-Sourced Embedded Systems
Akshay Dua, Nirupama Bulusu, Wu-Chang Feng, Wen Hu
Article No.: 154
DOI: 10.1145/2629338

Crowd-sourced mobile embedded systems allow people to contribute sensor data, for critical applications, including transportation, emergency response and eHealth. Data integrity becomes imperative as malicious participants can launch software and...

Section: Editorial

Introduction to the Special Issue on Real-Time, Embedded and Cyber-Physical Systems
Li-Pin Chang, Tei-Wei Kuo, Chris Gill, Jin Nakazawa
Article No.: 155
DOI: 10.1145/2660488

Branch Prediction-Directed Dynamic Instruction Cache Locking for Embedded Systems
Keni Qiu, Mengying Zhao, Chun Jason Xue, Alex Orailoglu
Article No.: 156
DOI: 10.1145/2660492

Cache locking is a cache management technique to preclude the replacement of locked cache contents. Cache locking is often adopted to improve cache access predictability in Worst-Case Execution Time (WCET) analysis. Static cache locking methods...

A Hybrid Storage Access Framework for High-Performance Virtual Machines
Chih-Kai Kang, Yu-Jhang Cai, Chin-Hsien Wu, Pi-Cheng Hsiu
Article No.: 157
DOI: 10.1145/2660493

In recent years, advances in virtualization technology have enabled multiple virtual machines to run on a physical machine, such that each virtual machine can perform independently with its own operating system. The IT industry has adopted...

Energy Efficiency Analysis for the Single Frequency Approximation (SFA) Scheme
Santiago Pagani, Jian-Jia Chen
Article No.: 158
DOI: 10.1145/2660490

Energy-efficient designs are important issues in computing systems. This article studies the energy efficiency of a simple and linear-time strategy, called the Single Frequency Approximation (SFA) scheme, for periodic real-time tasks on multicore...

Task Assignment Algorithms for Heterogeneous Multiprocessors
Gurulingesh Raravi, Vincent Nélis
Article No.: 159
DOI: 10.1145/2660494

Consider the problem of assigning implicit-deadline sporadic tasks on a heterogeneous multiprocessor platform comprising a constant number (denoted by t) of distinct types of processors—such a platform is referred to as a t-type...

Provably Good Task Assignment for Two-Type Heterogeneous Multiprocessors Using Cutting Planes
Björn Andersson, Gurulingesh Raravi
Article No.: 160
DOI: 10.1145/2660495

Consider scheduling of real-time tasks on a multiprocessor where migration is forbidden. Specifically, consider the problem of determining a task-to-processor assignment for a given collection of implicit-deadline sporadic tasks upon a...

Optimal Priority Assignment to Control Tasks
Giulio M. Mancuso, Enrico Bini, Gabriele Pannocchia
Article No.: 161
DOI: 10.1145/2660496

In embedded real-time systems, task priorities are often assigned to meet deadlines. However, in control tasks, a late completion of a task has no catastrophic consequence; rather, it has a quantifiable impact in the control performance achieved...

Utility-Based Resource Overbooking for Cyber-Physical Systems
Dionisio De Niz, Lutz Wrage, Anthony Rowe, Ragunathan (Raj) Rajkumar
Article No.: 162
DOI: 10.1145/2660497

Traditional hard real-time scheduling algorithms require the use of the worst-case execution times to guarantee that deadlines will be met. Unfortunately, many algorithms with parameters derived from sensing the physical world suffer large...

Scheduling Temporal Data with Dynamic Snapshot Consistency Requirement in Vehicular Cyber-Physical Systems
Kai Liu, Victor C. S. Lee, Joseph K. Y. Ng, Sang H. Son, Edwin H.-M. Sha
Article No.: 163
DOI: 10.1145/2629546

Timely and efficient data dissemination is one of the fundamental requirements to enable innovative applications in vehicular cyber-physical systems (VCPS). In this work, we intensively analyze the characteristics of temporal data dissemination in...

Section: Editorial

Introduction to the Special Issue on Virtual Prototyping of Parallel and Embedded Systems (ViPES)
Diana Goehringer
Article No.: 164
DOI: 10.1145/2675739

legaSCi: Legacy SystemC Model Integration into Parallel Simulators
Christoph Schumacher, Jan Henrik Weinstock, Rainer Leupers, Gerd Ascheid, Laura Tosoratto, Alessandro Lonardo, Dietmar Petras, Andreas Hoffmann
Article No.: 165
DOI: 10.1145/2678018

Architects and developers use virtual prototypes of computer systems to receive early feedback on hardware design decisions as well as to develop and debug system software. This is facilitated by the comprehensive inspection capabilities virtual...

Host-Compiled Multicore System Simulation for Early Real-Time Performance Evaluation
Parisa Razaghi, Andreas Gerstlauer
Article No.: 166
DOI: 10.1145/2678020

With increasing complexity and software content, modern embedded platforms employ a heterogeneous mix of multicore processors along with hardware accelerators in order to provide high performance in limited power budgets. To evaluate real-time...

Dynamically Instrumenting the QEMU Emulator for Linux Process Trace Generation with the GDB Debugger
Bojan Mihajlović, Željko Žilić, Warren J. Gross
Article No.: 167
DOI: 10.1145/2678022

In software debugging, trace generation techniques are used to resolve highly complex bugs. However, the emulators increasingly used for embedded software development do not yet offer the types of trace generation infrastructure available in...

Plug&Chip: A Framework for Supporting Rapid Prototyping of 3D Hybrid Virtual SoCs
Dionysios Diamantopoulos, Efstathios Sotiriou-Xanthopoulos, Kostas Siozios, George Economakos, Dimitrios Soudris
Article No.: 168
DOI: 10.1145/2661634

In the embedded system domain there is a continuous demand towards providing higher flexibility for application development. This trend strives for virtual prototyping solutions capable of performing fast system simulation. Among other benefits,...

A Framework for Supporting Adaptive Fault-Tolerant Solutions
Kostas Siozios, Dimitrios Soudris, Michael Hübner
Article No.: 169
DOI: 10.1145/2629473

For decades, computer architects pursued one primary goal: performance. The ever-faster transistors provided by Moore's law were translated into remarkable gains in operation frequency and power consumption. However, the device-level size and...