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A Brief Comment on “A Complete Self-Testing and Self-Configuring NoC Infrastructure for Cost-Effective MPSoCs” [ACM Transactions on Embedded Computing Systems 12 (2013) Article 106]
Rimpy Bishnoi, Vijay Laxmi, Manoj Singh Gaur, José Flich, Francisco Triviño
Article No.: 2
In the Ghiribaldi et al.  paper, a complete self-testing and self configuring NoC infrastructure for cost-effective MPSoCs was presented in order to make NoC architecture tolerant to faults. To overcome the complexity involved during the...
Modeling and Analysis of Fault Detection and Fault Tolerance in Wireless Sensor Networks
Arslan Munir, Joseph Antoon, Ann Gordon-Ross
Article No.: 3
Technological advancements in communications and embedded systems have led to the proliferation of Wireless Sensor Networks (WSNs) in a wide variety of application domains. These application domains include but are not limited to mission-critical...
Static Task Partitioning for Locked Caches in Multicore Real-Time Systems
Abhik Sarkar, Frank Mueller, Harini Ramaprasad
Article No.: 4
Growing processing demand on multitasking real-time systems can be met by employing scalable multicore architectures. For such environments, locking cache lines for hard real-time systems ensures timing predictability of data references and may...
Dependency-aware task-based parallel programming models have proven to be successful for developing efficient application software for multicore-based computer architectures. The programming model is amenable to programmers, thereby supporting...
Joint WCET and Update Activity Minimization for Cyber-Physical Systems
Yazhi Huang, Mengying Zhao, Chun Jason Xue
Article No.: 6
A cyber-physical system (CPS) is a desirable computing platform for many industrial and scientific applications, such as industrial process monitoring, environmental monitoring, chemical processes, and battlefield surveillance. The application of...
Performance and Reliability Analysis of Cross-Layer Optimizations of NAND Flash Controllers
Davide Bertozzi, Stefano Di Carlo, Salvatore Galfano, Marco Indaco, Piero Olivo, Paolo Prinetto, Cristian Zambelli
Article No.: 7
NAND flash memories are becoming the predominant technology in the implementation of mass storage systems for both embedded and high-performance applications. However, when considering data and code storage in Non-Volatile Memories (NVMs), such as...
System-Level Performance and Power Optimization for MPSoC: A Memory Access-Aware Approach
Ye-Jyun Lin, Chia-Lin Yang, Jiao-We Huang, Tay-Jyi Lin, Chih-Wen Hsueh, Naehyuck Chang
Article No.: 8
As the number of IPs in a multimedia Multi-Processor System-on-Chip (MPSoC) continues to increase, concurrent memory accesses from different IPs increasingly stress memory systems, which presents both opportunities and challenges for future MPSoC...
The Psi-Calculi Workbench: A Generic Tool for Applied Process Calculi
Johannes Borgstrom, Ramūnas Gutkovas, Ioana Rodhe, Björn Victor
Article No.: 9
Psi-calculi is a parametric framework for extensions of the pi-calculus with arbitrary data and logic. All instances of the framework inherit machine-checked proofs of the metatheory such as compositionality and bisimulation congruence. We present...
This article concerns the maximal synthesis for Hennessy-Milner Logic on Kripke structures with labeled transitions. We formally define, and prove the validity of, a theoretical framework that modifies a Kripke model to the least possible extent...
The main limitation of the verification approaches based on state enumeration is the state explosion problem. The partial order reduction techniques aim at attenuating this problem by reducing the number of transitions to be fired from each state...
A Hardware Framework for Yield and Reliability Enhancement in Chip Multiprocessors
Abhisek Pan, Rance Rodrigues, Sandip Kundu
Article No.: 12
Device reliability and manufacturability have emerged as dominant concerns in end-of-road CMOS devices. An increasing number of hardware failures are attributed to manufacturability or reliability problems. Maintaining an acceptable manufacturing...
Interactive Trace-Based Analysis Toolset for Manual Parallelization of C Programs
Mihai T. Lazarescu, Luciano Lavagno
Article No.: 13
Massive amounts of legacy sequential code need to be parallelized to make better use of modern multiprocessor architectures. Nevertheless, writing parallel programs is still a difficult task. Automated parallelization methods can be effective both...
A Hybrid Task Mapping Algorithm for Heterogeneous MPSoCs
Wei Quan, Andy D. Pimentel
Article No.: 14
The application workloads in modern MPSoC-based embedded systems are becoming increasingly dynamic. Different applications concurrently execute and contend for resources in such systems, which could cause serious changes in the intensity and...
Energy-Efficient Thread Assignment Optimization for Heterogeneous Multicore Systems
Vinicius Petrucci, Orlando Loques, Daniel Mossé, Rami Melhem, Neven Abou Gazala, Sameh Gobriel
Article No.: 15
The current trend to move from homogeneous to heterogeneous multicore systems provides compelling opportunities for achieving performance and energy efficiency goals. Running multiple threads in multicore systems poses challenges on meeting...
Exact Safety Verification of Hybrid Systems Based on Bilinear SOS Representation
Zhengfeng Yang, Wang Lin, Min Wu
Article No.: 16
In this article, we address the problem of safety verification of nonlinear hybrid systems. A hybrid symbolic-numeric method is presented to compute exact inequality invariants of hybrid systems efficiently. Some numerical invariants of a hybrid...
Does the Sharing of Execution Units Improve Performance/Power of Multicores?
Rance Rodrigues, Israel Koren, Sandip Kundu
Article No.: 17
Several studies and recent real-world designs have promoted sharing of underutilized resources between cores in a multicore processor to achieve better performance/power. It has been argued that when utilization of such resources is low, sharing...
GENESIS: Parallel Application Placement onto Reconfigurable Architectures (Invited for the Special Issue on Runtime Management)
Dionysios Diamantopoulos, Kostas Siozios, Sotirios Xydis, Dimitrios Soudris
Article No.: 18
Placement is though as the most time-consuming processes in physical implementation flows for reconfigurable architectures, while it highly affects the quality of derived application implementation, as it has impact on the maximum operating...
Recent industry trends show a drastic rise in the use of hand-held embedded devices, from everyday applications to medical (e.g., monitoring devices) and critical defense applications (e.g., sensor nodes). The two key requirements in the design of...