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Editorial: Distributed Public Ledgers and Block Chains—What Good Are They for Embedded Systems?
Sandeep K. Shukla
Article No.: 1
Guest Editorial: Special Issue on Virtual Prototyping of Parallel and Embedded Systems (ViPES)
Jeronimo Castrillon, Cristina Silvano
Article No.: 2
Architectural heterogeneity has proven to be an effective design paradigm to cope with an ever-increasing demand for computational power within tight energy budgets, in virtually every computing domain. Programmable manycore accelerators are...
Simulating Reconfigurable Multiprocessor Systems-on-Chip with MPSoCSim
Philipp Wehner, Jens Rettkowski, Tobias Kalb, Diana GÖhringer
Article No.: 4
Upcoming reconfigurable Multiprocessor Systems-on-Chip (MPSoCs) present new challenges for the design and early estimation of technology requirements due to their runtime adaptive hardware architecture. The usage of simulators offers capabilities...
A Lightweight Framework for the Dynamic Creation and Configuration of Virtual Platforms in SystemC
Christian Sauer, Hans-Peter Loeb
Article No.: 5
Virtual prototypes leverage SystemC/TLM for simulating programmable platforms comprising hundreds of modules. Their efficient creation and configuration is vital for acceptable turnaround times, for example, during performance exploration or...
A Scriptable Standard-Compliant Reporting and Logging Framework for SystemC
Rolf Meyer, Jan Wagner, Bastian Farkas, Sven Horsinka, Patrick Siegl, Rainer Buchty, Mladen Berekovic
Article No.: 6
With the ever-increasing complexity of digital designs, debugging and evaluation face likewise increasing challenges. While recent advances in hardware/software co-simulation have been made, solutions for corresponding debugging and evaluation did...
MPSoC Software Debugging on Virtual Platforms via Execution Control with Event Graphs
Luis Gabriel Murillo, Ròbert Lajos Bücs, Rainer Leupers, Gerd Ascheid
Article No.: 7
Virtual Platforms (VPs) are advantageous to develop and debug complex software for multi- and many-processor systems-on-chip (MPSoCs). VPs provide unrivaled controllability and visibility of the target, which can be exploited to examine bugs that...
A Framework for Interconnection-Aware Domain-Specific Many-Accelerator Synthesis
Efstathios Sotiriou-Xanthopoulos, Sotirios Xydis, Kostas Siozios, George Economakos, Dimitrios Soudris
Article No.: 8
Many-accelerator Systems-on-Chip (SoC) have recently emerged as a promising platform paradigm that combines parallelization with heterogeneity, in order to cover the increasing demands for high performance and energy efficiency. To exploit the...
Guest Editorial: Special Issue on Emerging Technologies in Embedded Software and Systems
Dakai Zhu, Meikang Qiu, Samarjit Chakraborty
Article No.: 9
Sleep-Mode Voltage Scaling: Enabling SRAM Data Retention at Ultra-Low Power in Embedded Microcontrollers
Hrishikesh Jayakumar, Arnab Raha, Vijay Raghunathan
Article No.: 10
In heavily duty-cycled embedded systems, the energy consumed by the microcontroller in idle mode is often the bottleneck for battery lifetime. Existing solutions address this problem by placing the microcontroller in a low-power (sleep) mode when...
Reducing Power Consumption and Latency in Mobile Devices Using an Event Stream Model
Stephen Marz, Brad Vander Zanden
Article No.: 11
Most consumer-based mobile devices use asynchronous events to awaken apps. Currently, event handling is implemented in either an application or an application framework such as Java’s virtual machine (VM) or Microsoft’s .NET, and it...
Mobile virtualization introduces extra layers in software stacks, which leads to performance degradation. Notably, each I/O operation has to pass through several software layers to reach the NAND-flash-based storage systems. This article targets...
Cache-Partitioned Preemption Threshold Scheduling
Zonghua Gu, Chao Wang, Haibo Zeng
Article No.: 13
For preemptive scheduling with shared cache, different tasks may cause interference in the shared cache, leading to Cache-Related Preemption Overhead (CRPD). Cache partitioning can be used to reduce or eliminate CRPD. We propose integration of...
Due to the efficient resource usage of integrating tasks with different criticality onto a shared platform, the integration with mixed-criticality tasks is becoming an increasingly important trend in the design of real-time systems. One challenge...
Automatic Parallelization of Multirate Block Diagrams of Control Systems on Multicore Platforms
Cumhur Erkan Tuncali, Georgios Fainekos, Yann-Hang Lee
Article No.: 15
This article addresses the problem of parallelizing model block diagrams for real-time embedded applications on multicore architectures. We describe a Mixed Integer Linear Programming formulation for finding a feasible mapping of the blocks to...
Crosstalk-Aware Automated Mapping for Optical Networks-on-Chip
Edoardo Fusella, Alessandro Cilardo
Article No.: 16
Optical networks-on-chip (NoCs) provide a promising answer to address the increasing requirements of ultra-high bandwidth and extremely low power consumption. Designing a photonic interconnect, however, involves a number of challenges that have no...
Graphics processing units (GPUs) are increasingly used for high-performance computing. Programming frameworks for general-purpose computing on GPUs (GPGPU), such as CUDA and OpenCL, are also maturing. Driving this trend is the recent proliferation...
Cyber-Physical Embedded Systems (CPESs) are distributed embedded systems integrated with various actuators and sensors. When it comes to the issue of CPES security, the most significant problem is the security of Embedded Sensor Networks (ESNs)....
We present ScorePlus, a software-hardware hybrid and federated experiment environment for Smart Grid. ScorePlus incorporates both a software emulator and hardware testbed, such that they all follow the same architecture, and the same Smart Grid...
Autonomous OA Removal in Real-Time from Single Channel EEG Data on a Wearable Device Using a Hybrid Algebraic-Wavelet Algorithm
Charvi A. Majmudar, Bashir I. Morshed
Article No.: 20
Electroencephalography (EEG) is a non-invasive technique to record brain activities in natural settings. Ocular Artifacts (OA) usually contaminates EEG signals, removal of which is critical for accurate feature extraction and classification. With...
Space-Efficient Index Scheme for PCM-Based Multiversion Databases in Cyber-Physical Systems
Yuan-Hung Kuan, Yuan-Hao Chang, Tseng-Yi Chen, Po-Chun Huang, Kam-Yiu Lam
Article No.: 21
In this article, we study the indexing problem of using PCM as the storage medium for embedded multiversion databases in cyber-physical systems (CPSs). Although the multiversion B+-tree (MVBT) index has been shown to be...
Modeling Distributed Real-Time Systems in TIOA and UPPAAL
Yusuf Bora Kartal, Ece GÜran Schmidt, Klaus Werner Schmidt
Article No.: 22
The mission- and life-critical properties of distributed real-time systems require concurrent modeling, analysis, and formal verification in the design stage. The timed input/output automata (TIOA) framework and the UPPAAL software package are two...
Analysis and Scheduling of a Battery-Less Mixed-Criticality System with Energy Uncertainty
Sedigheh Asyaban, Mehdi Kargahi, Lothar Thiele, Morteza Mohaqeqi
Article No.: 23
We consider a battery-less real-time embedded system equipped with an energy harvester. It scavenges energy from an environmental resource according to some stochastic patterns. The success of jobs is threatened in the case of energy shortage,...
Integrated Through-Silicon Via Placement and Application Mapping for 3D Mesh-Based NoC Design
Kanchan Manna, Shivam Swami, Santanu Chattopadhyay, Indranil Sengupta
Article No.: 24
This article proposes a solution to the integrated problem of Through-Silicon Via (TSV) placement and mapping of cores to the routers in a three-dimensional mesh-based Network-on-Chip (NoC) system. TSV geometry restricts their number in...
SPMPool: Runtime SPM Management for Memory-Intensive Applications in Embedded Many-Cores
Hossein Tajik, Bryan Donyanavard, Nikil Dutt, Janmartin Jahn, Jörg Henkel
Article No.: 25
Distributed Scratchpad Memories (SPMs) in embedded many-core systems require careful selection of data placement to achieve good performance. Applications mapped to these platforms have varying memory requirements based on their runtime behavior,...
Frequency-Aware ESL Power Estimation for ARM Cortex-A9 Using a Black Box Processor Model
Stefan Schürmans, Gereon Onnebrink, Rainer Leupers, Gerd Ascheid, Xiaotao Chen
Article No.: 26
Power estimation has become a strongly desired feature in Electronic System Level (ESL) simulations. Most existing power estimation approaches for this abstraction level require component models with observable internals. However, most ESL models...
Virtual platforms have become essential tools for the design of embedded systems. Developers rely on them for design space exploration and software debugging. However, with rising HW/SW complexity and the need to simulate more and more processors...