Embedded Computing Systems (TECS)


Search Issue
enter search term and/or author name


ACM Transactions on Embedded Computing Systems (TECS) - Special Issue on Real-Time and Embedded Technology and Applications, Domain-Specific Multicore Computing, Cross-Layer Dependable Embedded Systems, and Application of Concurrency to System Design (ACSD'13), Volume 13 Issue 4s, July 2014

Editorial: Diversity Galore & A Call for Resilient, Sustainable and Secure System Design
Sandeep K. Shukla
Article No.: 118
DOI: 10.1145/2632152

Editorial: Special issue on real-time and embedded technology and applications
Marco Di Natale, Rich West, Jian-Jia Chen, Rahul Mangharam
Article No.: 119
DOI: 10.1145/2588608

Explicit reservation of cache memory in a predictable, preemptive multitasking real-time system
Jack Whitham, Neil C. Audsley, Robert I. Davis
Article No.: 120
DOI: 10.1145/2523070

We describe and evaluate explicit reservation of cache memory to reduce the cache-related preemption delay (CRPD) observed when tasks share a cache in a preemptive multitasking hard real-time system. We demonstrate the approach using measurements...

MultiNets: A system for real-time switching between multiple network interfaces on mobile devices
Shahriar Nirjon, Angela Nicoara, Cheng-Hsin Hsu, Jatinder Pal Singh, John A. Stankovic
Article No.: 121
DOI: 10.1145/2489788

MultiNets is a system supporting seamless switch-over between wireless interfaces on mobile devices in real-time. MultiNets is configurable to run in three different modes: (i) Energy Saving mode--for choosing the interface that saves the...

Worst-case guarantees on a processor with temperature-based feedback control of speed
Pratyush Kumar, Lothar Thiele
Article No.: 122
DOI: 10.1145/2584611

On-chip temperatures continue to rise, in spite of design efforts towards more efficient cooling and novel low-power technologies. Run-time thermal management techniques, such as speed scaling and system throttling, constitute a standard component...

WCET analysis with MRU cache: Challenging LRU for predictability
Nan Guan, Mingsong Lv, Wang Yi, Ge Yu
Article No.: 123
DOI: 10.1145/2584655

Most previous work on cache analysis for WCET estimation assumes a particular replacement policy called LRU. In contrast, much less work has been done for non-LRU policies, since they are generally considered to be very unpredictable. However,...

A Unified WCET analysis framework for multicore platforms
Sudipta Chattopadhyay, Lee Kee Chong, Abhik Roychoudhury, Timon Kelter, Peter Marwedel, Heiko Falk
Article No.: 124
DOI: 10.1145/2584654

With the advent of multicore architectures, worst-case execution time (WCET) analysis has become an increasingly difficult problem. In this article, we propose a unified WCET analysis framework for multicore processors featuring both shared cache...

ColLoc: A collaborative location and tracking system on WirelessHART
Xiuming Zhu, Pei-Chi Huang, Jianyong Meng, Song Han, Aloysius K. Mok, Deji Chen, Mark Nixon
Article No.: 125
DOI: 10.1145/2584656

Localization in wireless sensor networks is an important functionality that is required for tracking personnel and assets in industrial environments, especially for emergency response. Current commercial localization systems such as GPS suffer...

Implementation and evaluation of mixed-criticality scheduling approaches for sporadic tasks
Huang-Ming Huang, Christopher Gill, Chenyang Lu
Article No.: 126
DOI: 10.1145/2584612

Traditional fixed-priority scheduling analysis for periodic and sporadic task sets is based on the assumption that all tasks are equally critical to the correct operation of the system. Therefore, every task has to be schedulable under the chosen...

Safety-critical medical device development using the UPP2SF model translation tool
Miroslav Pajic, Zhihao Jiang, Insup Lee, Oleg Sokolsky, Rahul Mangharam
Article No.: 127
DOI: 10.1145/2584651

Software-based control of life-critical embedded systems has become increasingly complex, and to a large extent has come to determine the safety of the human being. For example, implantable cardiac pacemakers have over 80,000 lines of code which...

Near optimal rate selection for wireless control systems
Abusayeed Saifullah, Chengjie Wu, Paras Babu Tiwari, You Xu, Yong Fu, Chenyang Lu, Yixin Chen
Article No.: 128
DOI: 10.1145/2584652

With the advent of industrial standards such as WirelessHART, process industries are now gravitating towards wireless control systems. Due to limited bandwidth in a wireless network shared by multiple control loops, it is critical to optimize the...

Introduction to the Special Issue on Domain-Specific Multicore Computing
Vijaykrishnan Narayanan, Jürgen Teich
Article No.: 129
DOI: 10.1145/2588609

Exploring Energy Scalability in Coprocessor-Dominated Architectures for Dark Silicon
Qiaoshi Zheng, Nathan Goulding-Hotta, Scott Ricketts, Steven Swanson, Michael Bedford Taylor, Jack Sampson
Article No.: 130
DOI: 10.1145/2584657

As chip designers face the prospect of increasingly dark silicon, there is increased interest in incorporating energy-efficient specialized coprocessors into general-purpose designs. For specialization to be a viable means of leveraging dark...

Architecture Support for Domain-Specific Accelerator-Rich CMPs
Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Beayna Grigorian, Glenn Reinman
Article No.: 131
DOI: 10.1145/2584664

This work discusses hardware architectural support for domain-specific accelerator-rich CMPs. First, we present a hardware resource management scheme for sharing of loosely coupled accelerators and arbitration of multiple requesting cores. Second,...

Hardware Acceleration for an Accurate Stereo Vision System Using Mini-Census Adaptive Support Region
Yi Shan, Yuchen Hao, Wenqiang Wang, Yu Wang, Xu Chen, Huazhong Yang, Wayne Luk
Article No.: 132
DOI: 10.1145/2584659

Domain of stereo vision is highly important in the fields of autonomous cars, video tolling, robotics, and aerial surveys. The specific feature of this domain is that we should handle not only the pixel-by-pixel 2D processing in one image but also...

Invasive Tightly-Coupled Processor Arrays: A Domain-Specific Architecture/Compiler Co-Design Approach
Frank Hannig, Vahid Lari, Srinivas Boppu, Alexandru Tanase, Oliver Reiche
Article No.: 133
DOI: 10.1145/2584660

We introduce a novel class of massively parallel processor architectures called invasive Tightly-Coupled Processor Arrays (TCPAs). The presented processor class is a highly parameterizable template which can be tailored before runtime to fulfill...

Delite: A Compiler Architecture for Performance-Oriented Embedded Domain-Specific Languages
Arvind K. Sujeeth, Kevin J. Brown, Hyoukjoong Lee, Tiark Rompf, Hassan Chafi, Martin Odersky, Kunle Olukotun
Article No.: 134
DOI: 10.1145/2584665

Developing high-performance software is a difficult task that requires the use of low-level, architecture-specific programming models (e.g., OpenMP for CMPs, CUDA for GPUs, MPI for clusters). It is typically not possible to write a single...

Dynamic Behavior Specification and Dynamic Mapping for Real-Time Embedded Systems: HOPES Approach
Hanwoong Jung, Chanhee Lee, Shin-Haeng Kang, Sungchan Kim, Hyunok Oh, Soonhoi Ha
Article No.: 135
DOI: 10.1145/2584658

As the number of processors in a chip increases and more functions are integrated, the system status will change dynamically due to various factors such as the workload variation, QoS requirement, and unexpected component failure. A typical method...

Introduction to Special Issue on Cross-layer Dependable Embedded Systems
Nikil Dutt, Mehdi Tahoori
Article No.: 136
DOI: 10.1145/2588610

A Cross-Layer Reliability Design Methodology for Efficient, Dependable Wireless Receivers
Christina Gimmler-Dumont, Norbert Wehn
Article No.: 137
DOI: 10.1145/2584666

Continued progressive downscaling of CMOS technologies threatens the reliability of chips for future embedded systems. We developed a novel design methodology for dependable wireless communication systems which exploits the mutual trade-offs of...

OCEAN: An Optimized HW/SW Reliability Mitigation Approach for Scratchpad Memories in Real-Time SoCs
Mohamed M. Sabry, David Atienza, Francky Catthoor
Article No.: 138
DOI: 10.1145/2584667

Recent process technology advances trigger reliability issues that degrade the Quality-of-Service (QoS) required by embedded Systems-on-Chip (SoCs). To maintain the required QoS with acceptable overheads, we propose OCEAN, a novel cross-layer...

Thermal Optimization in Network-on-Chip-Based 3D Chip Multiprocessors Using Dynamic Programming Networks
Nizar Dahir, Ra'ed Al-Dujaily, Terrence Mak, Alex Yakovlev
Article No.: 139
DOI: 10.1145/2584668

The substantial silicon density in 3D VLSI, albeit its numerous advantages, introduces serious thermal threats that would lead to faults and system failures. This article introduces a new strategy to effectively diffuse heat from NoC-based 3D...

Introduction to Special Issue on Application of Concurrency to System Design (ACSD'13)
Josep Carmona, Mihai Teodor Lazarescu, Marta Pietkiewicz-koutny
Article No.: 140
DOI: 10.1145/2627347

Polynomial Sufficient Conditions of Well-Behavedness and Home Markings in Subclasses of Weighted Petri Nets
Thomas Hujsa, Jean-Marc Delosme, Alix Munier-Kordon
Article No.: 141
DOI: 10.1145/2627349

Join-Free Petri nets, whose transitions have at most one input place, model systems without synchronizations, while Choice-Free Petri nets, whose places have at most one output transition, model systems without conflicts. These classes...

Incremental Bisimulation Abstraction Refinement
Lei Song, Lijun Zhang, Holger Hermanns, Jens CHR. Godskesen
Article No.: 142
DOI: 10.1145/2627352

Abstraction refinement techniques in probabilistic model checking are prominent approaches for verification of very large or infinite-state probabilistic concurrent systems. At the core of the refinement step lies the implicit or explicit analysis...

Algebra of Parameterised Graphs
Andrey Mokhov, Victor Khomenko
Article No.: 143
DOI: 10.1145/2627351

One of the difficulties in designing modern hardware systems is the necessity for comprehending and dealing with a very large number of system configurations, operational modes, and behavioural scenarios. It is often infeasible to consider and...

Sequentially Constructive Concurrency—A Conservative Extension of the Synchronous Model of Computation
Reinhard Von Hanxleden, Michael Mendler, Joaquín Aguado, Björn Duderstadt, Insa Fuhrmann, Christian Motika, Stephen Mercer, Owen O'brien, Partha Roop
Article No.: 144
DOI: 10.1145/2627350

Synchronous languages ensure determinate concurrency but at the price of restrictions on what programs are considered valid, or constructive. Meanwhile, sequential languages such as C and Java offer an intuitive, familiar programming...