Embedded Computing Systems (TECS)


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ACM Transactions on Embedded Computing Systems (TECS), Volume 3 Issue 2, May 2004

Editorial: Special issue on dynamically adaptable embedded systems
John Lach, Kia Bazargan
Pages: 233-236
DOI: 10.1145/993396.993397

An optimal algorithm for minimizing run-time reconfiguration delay
Soheil Ghiasi, Ani Nahapetian, Majid Sarrafzadeh
Pages: 237-256
DOI: 10.1145/993396.993398
Reconfiguration delay is one of the major barriers in the way of dynamically adapting a system to its application requirements. The run-time reconfiguration delay is quite comparable to the application latency for many classes of applications and...

A design flow for partially reconfigurable hardware
Ian Robertson, James Irvine
Pages: 257-283
DOI: 10.1145/993396.993399
This paper presents a top-down designer-driven design flow for creating hardware that exploits partial run-time reconfiguration. Computer-aided design (CAD) tools are presented, which complement conventional FPGA design environments to enable the...

Adaptive scheduling server for power-aware real-time tasks
Pedro Mejia-Alvarez, Eugene Levner, Daniel Mossé
Pages: 284-306
DOI: 10.1145/993396.993400
In this paper, we propose a novel scheduling framework for a dynamic real-time environment with energy constraints. This framework dynamically adjusts the CPU voltage/frequency so that no task in the system misses its deadline and the total energy...

Blocking-aware processor voltage scheduling for real-time tasks
Fan Zhang, Samuel T. Chanson
Pages: 307-335
DOI: 10.1145/993396.993401
As mobile computing is getting popular, there is a growing need for techniques that minimize energy consumption on battery-powered mobile devices. Processor voltage scheduling can effectively reduce processor energy consumption by lowering the...

Dynamic adaptation for fault tolerance and power management in embedded real-time systems
Ying Zhang, Krishnendu Chakrabarty
Pages: 336-360
DOI: 10.1145/993396.993402
Safety-critical embedded systems often operate in harsh environmental conditions that necessitate fault-tolerant computing techniques. In addition, many safety-critical systems execute real-time applications that require strict adherence to task...

The design of dynamically reconfigurable datapath coprocessors
Zhining Huang, Sharad Malik, Nahri Moreano, Guido Araujo
Pages: 361-384
DOI: 10.1145/993396.993403
Increasing nonrecurring engineering and mask costs are making it harder to turn to hardwired application specific integrated circuit (ASIC) solutions for high-performance applications. The volume required to amortize these high costs has been...

Multitasking on reconfigurable architectures: microarchitecture support and dynamic scheduling
Juanjo Noguera, Rosa M. Badia
Pages: 385-406
DOI: 10.1145/993396.993404
Dynamic scheduling for system-on-chip (SoC) platforms has become an important field of research due to the emerging range of applications with dynamic behavior (e.g., MPEG-4). Dynamically reconfigurable architectures are an interesting solution for...

A self-tuning cache architecture for embedded systems
Chuanjun Zhang, Frank Vahid, Roman Lysecky
Pages: 407-425
DOI: 10.1145/993396.993405
Memory accesses often account for about half of a microprocessor system's power consumption. Customizing a microprocessor cache's total size, line size, and associativity to a particular program is well known to have tremendous benefits for...

AIDA: Adaptive application-independent data aggregation in wireless sensor networks
Tian He, Brian M. Blum, John A. Stankovic, Tarek Abdelzaher
Pages: 426-457
DOI: 10.1145/993396.993406
Sensor networks, a novel paradigm in distributed wireless communication technology, have been proposed for various applications including military surveillance and environmental monitoring. These systems deploy heterogeneous collections of sensors...